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This is the programm you need for disassembling PPS4 binary code
| Target | Link | size | # of downloads |
|---|---|---|---|
| An exe | Win64 exe | 0 bytes | 12 |
| simple PPS4 disassembler | python 3.9 module | 14.0 KB | 9 |
ROM content in binary, disassembled, and coe format
| ROM id | Link | size | # of downloads |
|---|---|---|---|
| A1752CE ROM | A1752CE ROM | 14.0 KB | 7 |
| A1753CD ROM | A1753CD ROM | 13.9 KB | 5 |
| A1752EF ROM | A1752EF ROM | 14.0 KB | 7 |
| A1752CF ROM | A1752CF ROM | 14.2 KB | 7 |
| A1753CE ROM | A1753CE ROM | 13.9 KB | 7 |
Various resources for hardware design
| Data | Link | size | # of downloads |
|---|---|---|---|
| KiCad | QIL42 footprint | 2.7 KB | 8 |
Kicad archives of all PCBs
| Project | Archive | size | # of downloads |
|---|---|---|---|
| socket for converting A17 pinning to our clone system | socket A17xx | 1.1 MB | 3 |
| 4 layers PCB of core system (FPGA) | PPS4 Core PCB | 2.1 MB | 5 |
| 4 layers PCB for IOs management | PPS4.16 IOs manager | 1.6 MB | 4 |
| 4 layers PCB for the handling of A17 signals | basic PPS4 signals manager | 1.7 MB | 5 |
A17base contains the whole VHDL project
| A17base | project zip file | size | # of downloads |
|---|---|---|---|
| VHDL equations for A17 devices | A17Base ISE project | 20.3 MB | 4 |